Along with the miniaturization of semiconductor devices, a gate electrode structure for a complementary metal-oxide-semiconductor (CMOS) transistor has been shifting from polysilicon/SiO2 to metal/high dielectric constant material (high-k material). Specifically, a gate insulating film made of a high-k material such as HfO2 or the like is formed on the main surface of a semiconductor substrate (Si substrate), a first electrode layer made of a TiN film or the like serving as a cap is formed on the gate insulating film, a second electrode layer made of an AlTi film or the like containing Al as a work function metal is formed on the first electrode layer, and a third electrode layer made of a TiN film or the like serving as a barrier and a fourth electrode layer made of W are formed on the second electrode layer, thereby forming a laminate for p-channel and n-channel gate electrodes.
In this case, it is necessary to control a threshold of the transistor. As a technique for controlling the threshold of the transistor, there has been known a technique in which a composition ratio of Al contained as a work function metal in the second electrode layer of the laminate for the gate electrode is changed in a pMOS region and a nMOS region (see, e.g., Japanese Patent Application Publication No. 2015-060867). The threshold may also be controlled by changing the thickness of the TiN film used as a cap between the pMOS region and the nMOS region.
However, in the technique of changing the composition ratio of the work function metal in the pMOS region and the nMOS region disclosed in Japanese Patent Application Publication No. 2015-060867, after forming a TiAl film containing Al which is a work function metal, Al is diffused into a TiN film thereunder by lamp annealing to change the threshold of the transistor, but it requires a complicated operation. Further, in the technique of changing the thickness of the TiN film serving as a cap, it is necessary to perform the film formation in the gate electrode laminate of the pMOS region and the film formation in the gate electrode laminate of the nMOS region in separate steps. Therefore, in both techniques, the number of steps increases, which is complicated and high in cost. Further, if the miniaturization further progresses, it is expected that the thickness of the TiN film as a cap is further reduced, and it becomes difficult to control the threshold by changing the thickness of the TiN film.